Memory system and method using a memory device die

专利名称：Memory system and method using a

memory device die stacked with a logic dieusing data encoding, and system using thememory system

发明人：Ebrahim Hargan申请号：US13371045申请日：20120210公开号：US08539312B2公开日：20130917

专利附图：

摘要：A memory system and method using at least one memory device die stacked

with and coupled to a logic die by interconnects, such as through silicon vias. One suchlogic die includes an ECC system generating error checking and correcting (“ECC) bitscorresponding to write data. The write data are transmitted to the memory device dice ina packet containing a serial burst of a plurality of parallel data bits. The ECC bits aretransmitted to the memory device dice using through silicon vias that are different fromthe vias through which data are coupled. Such a logic die could also include a data businversion (“DBI”) system encoding the write data using a DBI algorithm and transmittingto the memory device dice DBI bits indicating whether the write data have been inverted.The DBI bits are transmitted using through silicon vias that are shared with the ECC bitswhen they are unused for transferring the ECC bits.

申请人：Ebrahim Hargan

地址：Boise ID US

国籍：US

代理机构：Dorsey & Whitney LLP

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